ASIC Design and Synthesis
This book describes simple to complex ASIC design practical scenarios using Verilog. Looking at current trends of miniaturization, the contents provide practical information on the issues in ASIC design and synthesis using Synopsys DC and their solution. It builds a story from th… Celý popis ↓
Porovnanie cien ASIC Design and Synthesis
Popis ASIC Design and Synthesis
ASIC Design and Synthesis
This book describes simple to complex ASIC design practical scenarios using Verilog. Looking at current trends of miniaturization, the contents provide practical information on the issues in ASIC design and synthesis using Synopsys DC and their solution. It builds a story from the basic fundamentals of ASIC designs to advanced RTL design concepts using Verilog.
It also covers architecture design strategies, multiple clock domain designs, low-power design techniques, DFT, pre-layout STA and the overall ASIC design flow with case studies. The book explains how to write efficient RTL using Verilog and how to improve design performance. The contents of this book will be useful to practicing hardware engineers, students, and hobbyists looking to learn about ASIC design and synthesis.
Parametre
- Výrobca
- Springer Verlag, Singapore
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